GSoC'21 with FOSSi
My summer with OpenRISC learning Formal methods to verify properties and identifying bugs in mor1kx processor.
August 16, 2021
Cappuccino Pipeline
Update on the progress of GSoC 2021 project: Formal Verification of OpenRISC's Mor1kx Processor using Yosys-formal tools
July 27, 2021
DPRAM & LRU
Beginning Mor1kx formal project with DPRAM and LRU algo verification which are submodules of the instruction cache.
June 5, 2021
Mor1kx Formal
An overview of formal verification of Mor1kx, an OpenRISC's 1000 processor IP core using yosys formal tools.
May 21, 2021